#ifndef __UDSF_LPW_C_
#define __UDSF_LPW_C_

#include "udf_global.h"
#include "../udsf/udsf_i2c_slave.c"
/*
*   notice:
*   UDSF 同UDF编程：不可调用cstd-lib,只可调用"copy_print.h"中列出的函数,UDSF文件内函数均需使用static修饰符，且UDF中以#include "UDSF.c"形式引用
*/

// 最后修改：2023年6月5日 09点32分 V1.0
#define LOOP_TIME 8
static void udsf_lpw_enter(void) __attribute__((unused));
static void udsf_lpw_exit(void) __attribute__((unused));
static void udsf_full_speed(void) __attribute__((unused));
static void udsf_iic_wakeup(uint8_t id) __attribute__((unused));
static void udsf_rtc_set(uint8_t id,uint32_t value) __attribute__((unused));
static int udsf_rtc_get_block(uint8_t id) __attribute__((unused));


// chirp dir: 0-row       data_inc = UDF_RANGE_USE 
//            1-column    data_inc = UDF_VEL_NUM

static void udsf_lpw_enter(void){

	USCI1->CFG1 = 0x00000051;  // USCI1 RX disable
	
	//GPIO->PMODE = 0;
//	PINMUX->MUX0 = 0x01000000; // TX pin mux -> USCI1
	PINMUX->MUX1 = 0;
	
//	GPIO->INTEN = 1 << 7;    // RX pin interrupt enable
//	GPIO->INTSTR = 1 << 7;   // RX pin interrupt flag clear
	
	//all off
	//SYSC->CLK_SEL = BBE_ISO_SEL_MSK | LRC_SEL_MSK | LRC_DIV128_MSK; // lrc and lrc/128
	ANACFG_SET(&paramANA_Venus->ana4); //all off	
	SYSC->CLK_SEL = BBE_ISO_SEL_MSK | LRC_SEL_MSK | LRC_DIV128_MSK; // lrc and lrc/128
}

static void udsf_lpw_exit(void){
	int headi;
	
	SYSC->CLK_SEL = BBE_ISO_SEL_MSK | LRC_SEL_MSK;//0x00010100;        // lrc and lrc/1
	ANACFG_SET(&paramANA_Venus->ana1); //40M
//	GPIO->PMODE = paramFunc->gpio_pmode;
	
	/* wait delay for osc ready*/
	for (headi = 0; headi < 110; headi++) {}  //Delay, 514us
}

static void udsf_rtc_set(uint8_t id,uint32_t value){

	if( id == 0 ){
		SYSC->CLK_EN &= ~RTC0_PATTERN_SW_Msk; // rtc0 clk enable
		RTC0->CMP = value;
		RTC0->CLR = RTC_CLR_Msk;  // clear  rtc0 cnt
		RTC0->IRQ_CFG |= RTC_IRQ_CLEAR_Msk;  // rtc0 irq flag clear
		RTC0->IRQ_CFG &= ~RTC_IRQ_MASK_Msk;  // rtc0 irq enable
		RTC0->WKU_CFG = 0x00;                // BIT1:1,repeat 0,single   BIT0:1,cmp*1024 0,cmp*1
	}
	else if( id == 1 ){
		SYSC->CLK_EN &= ~RTC1_PATTERN_SW_Msk; // rtc1 clk enable
		RTC1->CMP = value;
		RTC1->CLR = RTC_CLR_Msk;  // clear  rtc1 cnt
		RTC1->IRQ_CFG |= RTC_IRQ_CLEAR_Msk;  // rtc1 irq flag clear
		RTC1->IRQ_CFG &= ~RTC_IRQ_MASK_Msk;  // rtc1 irq enable
		RTC1->WKU_CFG = 0x00;                // BIT1:1,repeat 0,single   BIT0:1,cmp*1024 0,cmp*1
	}
	else{
		;
	}
	
	return;
}
static void udsf_iic_wakeup(uint8_t id){
	
	RTC_T * RTCX = RTC0;
			int  i = LOOP_TIME;
	if( id > 0 ){
		RTCX = RTC1;
	}

	while (1)
	{
		#if 0
//		int i;// uint8_t i , TBD:32位应该更快
		if (GPIO->INTSTR)
		{		
				GPIO->INTSTR = 0xffff;
				if (GPIO0_7 == 0)
				{
#if defined(IIC_TEST)				
					GPIO0_1=1;
				  GPIO0_1=0;
#endif					
//						SYSC->CLK_SEL = 0x10100;//BBE_ISO_SEL_MSK | LRC_SEL_MSK | 0;  //切1M   72uA

						for (i = 0; i < LOOP_TIME; i++)     
						{
								if (GPIO->INTSTR == 0)
								{
										if (GPIO0_7 != 0) // GPIO0_7 == 1, TBD: 判断非零可能更快
										{
												break;
										}
								}
								else
								{
										break;
								}
						}
						if ( i == LOOP_TIME)
						{
#if defined(IIC_TEST)								
						 GPIO0_2=1;
					   GPIO0_2=0;	
#endif							
								sUDF_global.state = 2;
								break;
						}
				}
		}
		#else
	 	 i = LOOP_TIME;	
		if (GPIO->INTSTR)
		{
			GPIO->INTSTR = 0xffff;
			if (GPIO0_6 == 0)
			{
//				GPIO0_2 = 1;
				 SYSC->CLK_SEL = 0x10100;//BBE_ISO_SEL_MSK | LRC_SEL_MSK | 0;  //切1M
#if defined(IIC_TEST)			
				GPIO0_1=1;
				GPIO0_1=0;
#endif
				while( --i ){
					if( (GPIO->INTSTR != 0) || (GPIO0_6 != 0) ){
						break;
					}
				}
				if( i == 0 ){
#if defined(IIC_TEST)			
					GPIO0_2=1;
					GPIO0_2=0;
#endif		
					sUDF_global.state = 2;

					return;
				}
			}
		}
		#endif
		
		if ((RTCX->IRQ_CFG & 0x1) != 0)
		{
			sUDF_global.rtc_f=1;
			break;
		}
		
//		WDT->STR = 1;
	}

//	RTCX->IRQ_CFG |= RTC_IRQ_MASK_Pos;   // rtcx irq disable
//	RTCX->IRQ_CFG |= RTC_IRQ_CLEAR_Msk;  // rtcx irq flag clear
//	SYSC->CLK_EN  |= (RTC0_PATTERN_SW_Msk<<(4*id));// rtcx clk disable
}
static int udsf_rtc_get_block(uint8_t id){
	
	int ret = 0;
	uint8_t  i;
	if( id == 0 ){
//		while (((RTC0->IRQ_CFG & 0x1ul) == 0)) { //wait rtc0 irq
//			if (GPIO->INTSTR & (1 << 7)) { //GPIO0.7 wakeup
//				ret = 1;
//				break;
//			}
//		}
	  while (1)
        {
            if (GPIO->INTSTR)
            {
                GPIO->INTSTR = 0xffff;
                if (GPIO0_6 == 0)
                {
                    SYSC->CLK_SEL = 0x10100;//BBE_ISO_SEL_MSK | LRC_SEL_MSK | 0;  //切1M  

                    for (i = 0; i < LOOP_TIME; i++)     
                    {
                        if (GPIO->INTSTR == 0)
                        {
                            if (GPIO0_6 == 1)
                            {
                                break;
                            }//
                        }
                        else
                        {
                            break;
                        }
                    }
                    if ( i == LOOP_TIME)
                    {
                        sUDF_global.state = 2;
                        break;
                    }
                }
            }
            if ((RTC0->IRQ_CFG & 0x1) != 0)
            {
                break;
            }
        }
		
		RTC0->IRQ_CFG |= RTC_IRQ_MASK_Pos;   // rtc0 irq disable
		RTC0->IRQ_CFG |= RTC_IRQ_CLEAR_Msk;  // rtc0 irq flag clear
		SYSC->CLK_EN  |= RTC0_PATTERN_SW_Msk;// rtc0 clk disable
	}else{
		//wait RTC1 irq
		while ((RTC1->IRQ_CFG & 0x1ul) == 0){ // wait rtc1 irq
			if( GPIO->INTSTR & (1<<6)){
				ret = 1;
				break;
			}
		}
		RTC1->IRQ_CFG |= RTC_IRQ_MASK_Pos;    // rtc1 irq disable
		RTC1->IRQ_CFG |= RTC_IRQ_CLEAR_Msk;   // rtc1 irq flag clear
		SYSC->CLK_EN  |= RTC1_PATTERN_SW_Msk; // rtc1 clk disable
	}
	return ret;
}

static void udsf_full_speed(void){

	SYSC->CLK_SEL = 0x0;  //enable 40M clk
//	GPIO->INTEN = 0;

	RTC0->IRQ_CFG |= RTC_IRQ_CLEAR_Msk;   // rtc0 irq flag clear
	RTC1->IRQ_CFG |= RTC_IRQ_CLEAR_Msk;   // rtc1 irq flag clear

//	PINMUX->MUX0 = paramFunc->gpio_pmux0; 
	PINMUX->MUX1 = paramFunc->gpio_pmux1; 
//	GPIO->PMODE  = paramFunc->gpio_pmode;
	USCI1->CFG1 = 0x00000053;             // USCI1 RX TX enable

	SYSC->SWRST &= ~(1 << 11);
	SYSC->SWRST |= (1 << 11);
	BBE_OPCLEAR(BBE_CLEAR_CFAR|BBE_CLEAR_P2|BBE_CLEAR_FFT);
}
#endif
